In brief, an optimized algorithm which is proposed early to over come the disadvantages of the Rom look-up table to implement the circuit for address generation for WiMAX Deinter leaver using Xilinx FPGA. According to IEEE 802.16E standard ,the implementation is very difficult, so algorithm is proposed which eliminates the floor function and thus it makes the FPGA implementation as less complexity, and now we optimized that proposed algorithm to make further less complexity by making high operating fvrequency and high latency. The implantation and resource utilization for quadrature phase-shift keying, 16-quadrature-amplitude modulation (QAM), and 64-QAM modulations along with all possible code rates makes this optimized algorithm be novel and high operating frequency when compared with early proposed algorithm. So this proposed optimized algorithm exhibits improvement in the resource utilization by optimizing the area
